Question
The CPU includes three types of instructions, which have different operands and will need different representations. Which one of the instructions requires two source registers?
►Jump and branch format instructions
►Immediate format instructions
►
Register format instructions
Question
What is the size of the memory space that is available to FALCON-A processor?
►2^8 bytes
►2^16 bytes
►2^32 bytes
►2^64 bytes
Question
How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
►IR<16..0>
►IR<15..0>
►IR<16..1>
►IR<15..1>
Question
Which one of the following portions of an instruction represents the operation to be performed?
►Address
►Instruction code
►Opcode
►Operand
Question
Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
►Opcode= R1, DR=ADD, SA=R2, SB=R3
►
Opcode= ADD, DR=R1, SA=R2, SB=R3
►Opcode= R2, DR=ADD, SA=R1, SB=R3
►Opcode= ADD, DR=R3, SA=R2, SB=R1
Question
What does the word ‘D’ in the ‘D-flip-Flop’ stands for?
►Data
►Digital
►Dynamic
►Double
Question
Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
►4 bytes, 7 bytes
►7 bytes, 16 bytes
►10 bytes, 19 bytes
►13 bytes, 22 bytes
Question
Which of the following can be defined as an address of the operand in a computer type instruction or the target address in a branch type instruction?
►Base address
►
Binary address
►Effective address
►All of the given
Question
Whic of the following statements is/are true about RISC processors’ claimed advantages over CISC processors? (a) Keeping regularly accessed variables in registers as opposed to keeping them in memory facilitates faster execution. (b) RISC CPUs outperform CISC CPU’s in procedural programming environments. (c) Instruction pipelining has helped RISC CPU’s to attain a target of 1 cycle per instruction. (d) It is easier to maintain the “family concept” in RISC CPUs.
► (a), (b) &(c)
► (b), (c) & (e)
► (c), (d) & (e)
► (a), (c) & (d)
Question
Which one of the following is/are the features of Register Transfer Language?
a) It is a symbolic language
b) It is describing the internal organization of digital computers
c) It is an elementary operation performed (during one clock pulse), on the information stored in one or more registers
d) It is high level language
►
(b) only
► (a) & (b) only
► (a) ,(b) & (d)
► (b),(c) & (d)
Question
Motorola MC68000 is an example of ———microprocessor.
►
CISC
►RISC
►SRC
►FALCON
Question
Which one of the following registers holds the instruction that is being executed?
►Accumulator
►Address Mask
►
Instruction Register
►Program Counter
Question
The external interface of FALCON-A consists of a ________ data bus.
►8-bit
►
16-bit
►24-bit
►32-bit
Question
In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized?
Select correct option:
►
Perfecting
►Pipelining
►Superscalar operation
►Speedup
Question
———–is the ability of application software to operate on models of equipment newer than the model for which it was originally developed.
Select correct option:
►Backward compatibility
►Data migration
►Reverse engineering
►Upward compatibility
Question
_________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus.
►INC4
►LPC
►PCout
►LC
Question
Which one of the following registers stores a previously calculated value or a value loaded from the main memory?
►Accumulator
►Address Mask
►Instruction Register
►Program Counter
Question
Computer system performance is usually measured by the —————
►Time to execute a program or program mix
►The speed with which it executes programs
►Processor’s utilization in solving the problems
►Instructions that can be carried out simultaneously
Question
Which one of the following register(s) that is/are programmer invisible and is/are required to hold an operand or result value while the bus is busy transmitting some other value?
►Instruction Register
►Memory address register
►Memory Buffer Register
►Registers A and C
Question
————– performs the data operations as commanded by the program instructions.
►Control
►Data path
►Structural RTL
►Timing
Question
Which one of the following register(s) contain(s) the address of the place the CPU wants to work with in the main memory and is/are directly connected to the RAM chips on the motherboard?
►Instruction Register
►Memory address register
►Memory Buffer Register
►Registers A and C
Question
For any of the instructions that are a part of the instruction set of the SRC, there are cerain_________required; which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location.
►Register
►Control signals
►Memory
►None of the given
Question
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide.
►8-bits
►16-bits
►32-bits
►64-bits
Question
What is the instruction length of the FALCON-A processor?
►8-bits
►16-bits
►32-bits
►64-bits
Question
_________control signals enable the input to the PC for receiving a value that is currently on the internal processor bus.
►LPC
►INC4
►LC
►I
Question
Which one of the following is a bi-stable device, capable of storing one bit of information?
►Decoder
►Flip-Flop
►Multiplexer
►Diplexer
Question
Which instruction is used to store register to memory using relative address?
►ld instruction
►ldr instruction
►lar instruction
►str instruction
Question
Which field of the machine language instruction is the “type of operation” that is to be performed?
►Op-code
►CPU registers
►Momory cells
►I/O locations
Question
The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56]
►Add R3, 56
►lar R3, 56
►ldr R3, 56
►str R3, 56
Question
_______ operation is required to change the processor’s state to a known, defined value.
►Change
►Reset
►Update
►None of the given
Question
which type of instructions help in changing the flow of the program as and when required?
►Arithmetic
►Control
►Data transfer
►Floating point
Question
Which one of the following registers holds the address of the next instruction to be executed?
►Accumulator
►Address Mask
►Instruction Register
►Program Counter
Question
Which one of the following is the memory organization of EAGLE processor?
►8-bits
►16-bits
►32-bit
►64-bits
Question
The external interface of FALCON-A consists of a ______address bus and ______a data bus.
►8-bit. 8-bit
►16-bit. 16-bit
►16-bit. 24-bit
►16-bit. 32-bit
Question
Type A of SRC has which of the following instructions?
A) andi, instruction
b) No operation or nop instruction
c) lar instruction
d) ldr instruction
e) Stop operation or stop instruction
►& (b)
►(b) & (c)
►& (e)
►(b) & (e)
Question
What is the instruction length of the SRC processor?
► 8 bits
► 16 bits
► 32 bits
► 64 bits
Question
Which one of the following is the memory organization of
FALCON-E processor?
► 28 * 8 bits
► 216 * 8 bits
► 232 * 8 bits
► 264 * 8 bits
Question
“If P = 1, then load the contents of register R1 into register R2”.
This statement can be written in RTL as:
► R1 ¬ R2
► P: R1 ¬ R2
► P: R2 ¬ R1
► P: R2 ¬ R1, P: R1 ¬ R2
Question
The instruction —————will
load
the register R3 with the contents of the memory location M [PC+56]
►Add R3, 56
►lar R3, 56
►ldr R3, 56
►str R3, 56
Question
———-are faster than cache memory
►Accumulator register
►CPU registers
►I/O devices
►ROM
Question
P: R3 ¬ R5
MAR ¬ IR
These two are instructions written using RTL .If these two operations is to occur simultaneously then which symbol will we use to separate them so that it becomes a correct statement with the condition that two operations occur simultaneously?
► Arrow ¬
► Colon :
► Comma ,
► Parentheses ()
Question
Prefetching can be considered a primitive form of————-
►Pipelining
►Multi-processing
►Self-execution
►Exception
Question
The processor must have a way of saving information about its state or context so that it can be restored upon return from the ————-
►Exception
►Function
►Stack
►Thread
Question
Which one of the following circuit design levels is called the gate level?
►Logic Design Level
►Circuit Level
►Mask Level
►None of the given
Question
__________
enable the input to the PC for receiving a value that is currently on the internal processor bus.
► LPC
► INC4
► LC
► Cout
Question
________ operation is required to change the processor’s state to a known, defined value.
► Change
► Reset
► Update
► None of the given
Question
There are _________ types of reset operations in SRC
► Two
► Three
► Four
► Five
Question
_____________ controller controls the sequence of the flow of microinstructions.
► Multiplexer
► Microprogram
► ALU
► None of the given
Question
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.
► 8-bits
► 24-bits
► 32-bits
► 64-bits
Question
Which of the following statement(s) is/are correct about Reduced Instruction Set Computer (RISC) architectures.
(i) The typical RISC machine instruction set is small, and is usually a subject of a CISC instruction set.
(ii) No arithmetic or logical instruction can refer to the memory directly.
(iii) A comparatively large number of user registers are available.
(iv) Instructions can be easily decoded through hard-wired control units.
► (i) and (iii) only
► (i), (iii) and (iv)
► (i), (ii) and (iii) only
► (i),(ii),(iii) and (iv)
Question
Which one of the following register holds the instruction that is being executed?
► Accumulator
► Address Mask
► Instruction Register
► Program Counter
Question
_____________all memory systems are dumb, in that they respond to only two commands: read or write
Virtually
Logically
Physically
None of These
Question
To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
MEMORY
REGISTER
DATA BUS
ALL OF ABOVE
Question
___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
Control
DATA MOVMENT
Arithmetic
LOGICAL
Question
The code size of 2-address instruction is ________________.
► 5 bytes
► 7 bytes
► 3 bytes
► 2 bytes
Question No: 2
The data movement instructions ___________ data within the machine and to or from input/output devices.
► Store
► Load
► Move
► None of Above
Question
Register-register instructions use ____________ memory operands out of a total of 3 operands
► 1
► 3
► 0
► 2
Question
_____________all memory systems are dumb, in that they respond to only two commands: read or write.
► Virtually
► Logically
► Physically
► None of Above
Question
Flip-flop is a ____________device, capable of storing one bit of Information
► Bi-stable
► Unit-stable
► Stable
► Storage
Question
In which one of the following addressing modes, the value to be stored in memory is obtained by directly retrieving it from another memory location?
►
Direct Addressing Mode
►Immediate addressing mode
►Indirect Addressing Mode
►Register (Direct) Addressing Mode
Question
Execution time of a program with respect to the processor is calculated as:
►Execution Time = IC x CPI x MIPS
►
Execution Time = IC x CPI x T
►Execution Time = CPI x T x MFLOPS
►Execution Time = IC x T
Question
An “assembler” that runs on one processor and translates an assembly language program written for another processor into the machine language of the other processor is called a —————-
►compiler
►
cross assembler
►debugger
►linker
Question
What functionality is performed by the instruction “lar R3, 36” of SRC?
►It will load the register R3 with the contents of the memory location M [PC+36]
►
It will load the register R3 with the relative address itself (PC+36).
►It will store the register R3 contents to the memory location M [PC+36]
►No operation
Question
Which operator is used to ‘name’ registers, or part of registers, in the Register Transfer Language?
Select correct option:
►:=
►&
►%
►©
Question
What is the working of Processor Status Word (PSW)?
►To hold the current status of the processor.
►To hold the address of the current process
►To hold the instruction that the computer is currently processing
►To hold the address of the next instruction in memory that is to be executed
Question
Almost every commercial computer has its own particular ———- language
►3GL
►English language
►Higher level language
►assembly language
Question
In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
►Arithmetic/logic
►Load/store
►Test/branch
►None of the given
Question
What functionality is performed by the instruction “str R8, 34” of SRC?
►It will load the register R8 with the contents of the memory location M [PC+34]
►It will load the register R8 with the relative address itself (PC+34).
►It will store the register R8 contents to the memory location M [PC+34]
►No operation
Question
What does the instruction “ldr R3, 58” of SRC do?
►It will load the register R3 with the contents of the memory location M [PC+58]
►It will load the register R3 with the relative address itself (PC+58).
►It will store the register R3 contents to the memory location M [PC+58]
►No operation
Question
Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
►Processor-Memory-Switch level (PMS level)
►Instruction Set Level
►Register Transfer Level
►None of the given
Question
Which of the instruction is used to load register from memory using a relative address?
►ld instruction
►
ldr instruction
►lar instruction
►str instruction
Question
For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory
►Jump
►Control
►load/store
►None of the given