Answer Q#1:
The interrupt vectors are located in memory and supported by operating system reside in kernal in case of Dos kernel is io.sys and in case of window kernel is kernel 32.dll
Answer Q#2:
The first 32 vector 0-31 are reserved by Intel for processor generated exception
Answer Q#3:
In Real Address Mode, iret pops CS, the flags register, and the instruction pointer from the stack and resumes the routine that was interrupted. In Protected Mode, the setting of the nested task flag (NT) determines the action of iret. The IOPL flag register bits are changed when CPL equals 0 and the new flag image is popped from the stack. Ret returns from an interrupt procedure without a task switch if NT equals 0. Returned code must be equally or less privileged than the interrupt routine as indicated CS selector RPL bits popped from the stack. If the returned code is less privileged, iret pops SS and the stack pointer from the stack. Ret reverses the operation of an INT or CALL that caused the task switch if NT equals 1. The task executing iret is updated and saved in its task segment. The code that follows iret is executed if the task is re-entered.
Answer Q#4:
Event that can generate interrupt include a timer overflow or research an assign value, a serial input device has receive a new character, a serial output device is ready to send a new character, an input pin has change state, the system voltage has dropped below a safe level, ADC has finished a new conversion.
Answer Q#5:
A trap flag permits operation of a processor in single-step mode. If such a flag is available, debuggers can use it to step through the execution of a computer program.